feat: implement virtual clock timing architecture (Phases 5-8)
Introduces a VirtualClock-based timing system replacing wall-clock Instant-based timing for hardware-accurate simulation. New modules: - virtual_clock.rs: Shared virtual time source with condvar sync - real_time_governor.rs: Thread that advances virtual time - component_timing.rs: Per-component timing constraints Key changes: - Component trait: added update_at_time(), timing(), set_virtual_clock_optional() - All Intel 400x components migrated to virtual-time-aware operation - ConfigurableSystem: start() returns Result, spawns governor thread - GUI: timing controls (speed slider, mode selector, step button) - Console: speed/mode/step/time commands - Backward compatible: legacy fallback for components without VirtualClock Reviewed-by: code review found 2 warnings (clock resume() dead code, reset() safety docs) — both fixed.
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28 changed files with 7186 additions and 270 deletions
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@ -6,7 +6,6 @@ use rusty_emu::pin::{Pin, PinValue};
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use std::any::Any;
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use std::collections::HashMap;
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use std::sync::Arc;
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use std::time::Instant;
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// Mock component for testing trait implementations
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#[derive(Debug)]
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@ -247,7 +246,7 @@ mod tests {
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let mut high_nibble: Option<u8> = None;
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let mut low_nibble: Option<u8> = None;
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let mut full_address_ready = false;
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let mut address_latch_time: Option<Instant> = None;
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let mut address_latch_time: Option<Duration> = None;
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let access_time = Duration::from_nanos(100);
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// Mock address handler for testing the algorithm
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@ -275,6 +274,7 @@ mod tests {
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&mut full_address_ready,
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&mut address_latch_time,
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access_time,
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Duration::from_nanos(100), // virtual_time
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);
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assert_eq!(high_nibble, Some(0x12));
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@ -282,7 +282,7 @@ mod tests {
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assert_eq!(full_address_ready, false);
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assert_eq!(address_latch_time, None);
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// Second cycle: low nibble
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// Second cycle: low nibble — address_latch_time is now set internally
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handler.handle_address_latching(
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0x34,
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&mut high_nibble,
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@ -290,12 +290,14 @@ mod tests {
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&mut full_address_ready,
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&mut address_latch_time,
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access_time,
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Duration::from_nanos(200), // virtual_time when address is fully latched
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);
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assert_eq!(high_nibble, None); // Should be cleared
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assert_eq!(low_nibble, None); // Should be cleared
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assert_eq!(full_address_ready, true);
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assert!(address_latch_time.is_some());
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// address_latch_time is now set by handle_address_latching() internally
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assert_eq!(address_latch_time, Some(Duration::from_nanos(200)));
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// Verify the assembled address
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let assembled = handler.assemble_full_address(Some(0x02), Some(0x04));
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@ -311,26 +313,37 @@ mod tests {
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Intel400xAddressHandling::handle_latency_wait(
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&MockComponent::new(),
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&None,
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access_time
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access_time,
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Duration::from_nanos(200),
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),
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false
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);
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// Test with recent latch time - need to ensure enough time has elapsed
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// Create the latch time, then sleep to guarantee elapsed >= access_time
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let recent_time = Some(Instant::now());
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thread::sleep(Duration::from_micros(1));
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// Test with latch time and sufficient virtual time elapsed
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let latch_time = Some(Duration::from_nanos(50));
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let virtual_time = Duration::from_nanos(200);
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assert_eq!(
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Intel400xAddressHandling::handle_latency_wait(
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&MockComponent::new(),
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&recent_time,
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access_time
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&latch_time,
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access_time,
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virtual_time,
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),
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true
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);
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// Note: Testing with elapsed time would require sleeping or mocking time
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// This demonstrates the logic structure is correct
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// Test with latch time but insufficient virtual time elapsed
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let latch_time = Some(Duration::from_nanos(150));
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let virtual_time = Duration::from_nanos(200);
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assert_eq!(
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Intel400xAddressHandling::handle_latency_wait(
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&MockComponent::new(),
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&latch_time,
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access_time,
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virtual_time,
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),
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false
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);
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}
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#[test]
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