feat: migrate to parking_lot mutex and add system control architecture
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parent
14060e15e5
commit
54144d10e9
29 changed files with 2387 additions and 1130 deletions
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@ -32,8 +32,8 @@ fn create_test_ram() -> Intel4002 {
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let phi1_pin = ram.get_pin("PHI1").unwrap();
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let phi2_pin = ram.get_pin("PHI2").unwrap();
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{
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let mut phi1_guard = phi1_pin.lock().unwrap();
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let mut phi2_guard = phi2_pin.lock().unwrap();
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let mut phi1_guard = phi1_pin.lock();
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let mut phi2_guard = phi2_pin.lock();
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phi1_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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phi2_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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}
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@ -55,7 +55,7 @@ fn set_data_bus(ram: &Intel4002, value: u8) {
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for i in 0..4 {
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if let Ok(pin) = ram.get_pin(&format!("D{}", i)) {
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if let Ok(mut pin_guard) = pin.lock() {
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if let Some(mut pin_guard) = pin.try_lock() {
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let bit_value = (nibble >> i) & 1;
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let pin_value = if bit_value == 1 {
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PinValue::High
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@ -74,7 +74,7 @@ fn set_data_bus(ram: &Intel4002, value: u8) {
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fn clear_data_bus_drivers(ram: &Intel4002) {
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for i in 0..4 {
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if let Ok(pin) = ram.get_pin(&format!("D{}", i)) {
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if let Ok(mut pin_guard) = pin.lock() {
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if let Some(mut pin_guard) = pin.try_lock() {
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pin_guard.remove_driver("TEST");
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}
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}
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@ -90,8 +90,8 @@ fn generate_clock_edge(ram: &mut Intel4002, phi1_high: bool, phi2_high: bool) {
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// Set clock pins
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{
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let mut phi1_guard = phi1_pin.lock().unwrap();
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let mut phi2_guard = phi2_pin.lock().unwrap();
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let mut phi1_guard = phi1_pin.lock();
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let mut phi2_guard = phi2_pin.lock();
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phi1_guard.set_driver(
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Some("TEST".to_string()),
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@ -217,16 +217,16 @@ fn test_ram_read_state_progression() {
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// Read data bus value
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let mut data_value = 0;
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if d0_pin.lock().unwrap().read() == PinValue::High {
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if d0_pin.lock().read() == PinValue::High {
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data_value |= 1 << 0;
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}
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if d1_pin.lock().unwrap().read() == PinValue::High {
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if d1_pin.lock().read() == PinValue::High {
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data_value |= 1 << 1;
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}
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if d2_pin.lock().unwrap().read() == PinValue::High {
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if d2_pin.lock().read() == PinValue::High {
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data_value |= 1 << 2;
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}
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if d3_pin.lock().unwrap().read() == PinValue::High {
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if d3_pin.lock().read() == PinValue::High {
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data_value |= 1 << 3;
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}
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@ -470,7 +470,7 @@ fn test_reset_functionality() {
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// Assert RESET (active low)
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let reset_pin = ram.get_pin("RESET").unwrap();
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{
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let mut reset_guard = reset_pin.lock().unwrap();
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let mut reset_guard = reset_pin.lock();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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}
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wait_for_pin_settlement();
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