jan/rusty_emu
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Unified the 400x state machine for address latching

Browse source 
Fixed timing issues
This commit is contained in:
Jan-Peter von Hunnius 2025-11-14 18:51:10 +01:00
parent e17d6ad177
commit 633463e370
26 changed files with 11904 additions and 2471 deletions
Download patch file Download diff file Expand all files Collapse all files

25
src/system_config.rs
View file

@ -120,6 +120,7 @@ pub struct SystemFactory {
impl SystemFactory {
pub fn new() -> Self {
println!("Starting SystemFactory::new");
let mut factory = SystemFactory {
component_registry: HashMap::new(),
};
@ -128,6 +129,7 @@ impl SystemFactory {
}
fn register_default_components(&mut self) {
println!("Starting register_default_components");
// Register component creation functions
self.component_registry.insert(
"intel_4004".to_string(),
@ -202,25 +204,22 @@ impl SystemFactory {
"intel_4002".to_string(),
|config: &ComponentConfig, name: String| {
if let ComponentConfig::Single(single) = config {
let variant = single.properties.get("variant")
.and_then(|v| v.as_str())
.unwrap_or("Type1");
let access_time = single.properties.get("access_time")
let access_time = single
.properties
.get("access_time")
.and_then(|v| v.as_u64())
.unwrap_or(500);
let ram_variant = match variant {
"Type2" => crate::components::memory::intel_4002::RamVariant::Type2,
_ => crate::components::memory::intel_4002::RamVariant::Type1,
};
Ok(Box::new(crate::components::memory::intel_4002::Intel4002::new_with_variant_and_access_time(
name, ram_variant, access_time
)))
Ok(Box::new(
crate::components::memory::intel_4002::Intel4002::new_with_access_time(
name,
access_time,
),
))
} else {
Err("Intel 4002 must be single component".to_string())
}
}
},
);
self.component_registry.insert(