Fix Intel 4004 CPU instruction set and improve MCS-4 timing accuracy

Overhaul the Intel 4004 instruction set to match the real opcode map,
adding missing instructions (NOP, FIM, FIN, JIN, ISZ, KBP, DCL, WR0-3,
RD0-3) and refining two-byte instruction handling with proper M1/M2
data phases.  Rewrite the CPU fetch-execute cycle to correctly process
two-byte opcodes across separate clock cycles.

Improve Intel 4001 ROM timing with M1/M2 nibble phase tracking and an
A3 wait counter so the ROM drives data only when the CPU expects it.
Fix state-machine transition helpers in Intel 4002 and 4003 to capture
the old state before processing events, preventing incorrect exit/entry
callbacks.

Add non-propagating pin driver methods to prevent deadlocks caused by
bidirectional pin connections during signal propagation.

Add Fibonacci integration test and opcode fix plan document.
Update all README files to reflect the new instruction set.

src/README.md

@@ -8,23 +8,35 @@ written in Rust.
 ```
 src/
 ├── lib.rs                 # Library root and main exports
-├── main.rs               # Binary entry point
+├── main.rs               # Binary entry point (GUI, console, CLI)
 ├── component.rs          # Core component trait definitions
+├── connection.rs         # Component interconnection
 ├── pin.rs               # Pin and signal abstractions
-├── connection.rs        # Component interconnection
-├── bus.rs              # Data bus implementations
-├── types.rs            # Common type definitions
-├── components/         # Hardware component implementations
-│   ├── mod.rs         # Component module exports
-│   ├── common/        # Shared functionality
-│   │   ├── mod.rs    # Common exports
-│   │   └── intel_400x.rs  # Intel 400x common traits
-│   ├── cpu/          # CPU implementations
-│   ├── memory/       # Memory component implementations
-│   └── clock/       # Clock generation components
-└── systems/         # Complete system integrations
-    ├── mod.rs      # System module exports
-    └── intel_mcs_4.rs    # Intel MCS-4 system
+├── types.rs             # Common type definitions (U12 address type)
+├── system_config.rs     # JSON-based system configuration
+├── gui/                 # Graphical user interface
+│   ├── mod.rs          # GUI module exports
+│   ├── components.rs   # GUI component implementations
+│   └── state.rs        # GUI state management
+└── components/          # Hardware component implementations
+    ├── mod.rs          # Component module exports
+    ├── common/         # Shared Intel 400x functionality
+    │   ├── mod.rs     # Common exports
+    │   └── intel_400x.rs  # Intel 400x unified state machine and traits
+    ├── cpu/           # CPU implementations
+    │   ├── mod.rs    # CPU module exports
+    │   ├── intel_4004.rs  # Intel 4004 CPU (complete instruction set)
+    │   ├── mos_6502.rs    # MOS 6502 CPU (placeholder)
+    │   └── wdc_65c02.rs   # WDC 65C02 CPU (placeholder)
+    ├── memory/        # Memory component implementations
+    │   ├── mod.rs    # Memory module exports
+    │   ├── intel_4001.rs  # Intel 4001 ROM with I/O ports
+    │   ├── intel_4002.rs  # Intel 4002 RAM with output ports
+    │   └── intel_4003.rs  # Intel 4003 shift register
+    └── clock/         # Clock generation components
+        ├── mod.rs    # Clock module exports
+        ├── generic_clock.rs   # Generic clock generator
+        └── two_phase_clock.rs # Two-phase clock for Intel 400x
 ```
 
 ## Core Abstractions
@@ -71,8 +83,6 @@ The system uses a two-phase clock architecture (Φ1, Φ2) that matches the Intel
 - **Intel4001**: 256-byte ROM with 4-bit I/O ports
 - **Intel4002**: 320-bit RAM with 4-bit output ports
 - **Intel4003**: 10-bit shift register
-- **GenericRAM**: Generic RAM implementation
-- **GenericROM**: Generic ROM implementation
 
 ### Common Functionality (`src/components/common/`)
 
@@ -88,18 +98,18 @@ The system uses a two-phase clock architecture (Φ1, Φ2) that matches the Intel
 
 - **GenericClock**: Configurable clock generator
 
-## System Integration (`src/systems/`)
+## System Configuration (`src/system_config.rs`)
 
-### Intel MCS-4 System
+### JSON-Based System Configuration
 
-Complete Intel MCS-4 (Micro Computer System) implementation featuring:
+Complete system configuration via JSON files featuring:
 
-- Intel 4004 CPU
-- Intel 4001 ROM units
-- Intel 4002 RAM units
-- Intel 4003 shift registers
-- System clock and timing
-- Component interconnection
+- Intel 4004 CPU with configurable clock speed
+- Intel 4001 ROM units with programmable contents
+- Intel 4002 RAM units with bank selection
+- Intel 4003 shift registers for I/O expansion
+- System clock and timing configuration
+- Automatic component interconnection via pin wiring
 
 ## Key Features
 
@@ -145,17 +155,15 @@ rom.update(); // Process one clock cycle
 ### System Integration
 
 ```rust
-use rusty_emu::systems::intel_mcs_4::IntelMCS4;
+use rusty_emu::system_config::SystemFactory;
 
-// Create complete MCS-4 system
-let system = IntelMCS4::new();
-
-// Load program into ROM
-system.load_program(0, & program_data) ?;
+// Create system from JSON configuration
+let factory = SystemFactory::new();
+let system = factory.create_from_json("configs/mcs4_basic.json") ?;
 
 // Get system information
 let info = system.get_system_info();
-println!("Loaded system: {} with {} components", info.name, info.component_count);
+println!("Created system: {} with {} components", info.name, info.component_count);
 
 // Run simulation (in a real application)
 // system.run();