From 6e245b615e33f21ebad405a589ce95bcb6412d6b Mon Sep 17 00:00:00 2001 From: Jan-Peter von Hunnius Date: Thu, 26 Feb 2026 20:07:05 +0100 Subject: [PATCH] chore: remove debug logging statements and fix clock propagation --- src/components/clock/two_phase_clock.rs | 1 + src/components/common/intel_400x.rs | 11 +---------- src/components/memory/intel_4001.rs | 23 ----------------------- 3 files changed, 2 insertions(+), 33 deletions(-) diff --git a/src/components/clock/two_phase_clock.rs b/src/components/clock/two_phase_clock.rs index e5e3c9d..ae34d87 100644 --- a/src/components/clock/two_phase_clock.rs +++ b/src/components/clock/two_phase_clock.rs @@ -73,6 +73,7 @@ impl TwoPhaseClock { let connection_count = pin_guard.get_connected_pins().len(); if connection_count > 0 { pin_guard.propagate(); + pin_guard.propagate(); } } } diff --git a/src/components/common/intel_400x.rs b/src/components/common/intel_400x.rs index 1f97b70..470179b 100644 --- a/src/components/common/intel_400x.rs +++ b/src/components/common/intel_400x.rs @@ -1563,20 +1563,11 @@ mod tests { std::thread::sleep(Duration::from_millis(2)); assert!(sm.is_latency_elapsed()); - // Latency elapsed should transition to DriveData - println!( - "DEBUG: Before LatencyElapsed event, state: {:?}", - sm.get_state() - ); - // Ensure state machine is in WaitLatency state before processing LatencyElapsed assert_eq!(sm.get_state(), Intel400xUnifiedState::WaitLatency); process_event_direct(&mut sm, Intel400xEvent::LatencyElapsed); - println!( - "DEBUG: After LatencyElapsed event, state: {:?}", - sm.get_state() - ); + assert_eq!(sm.get_state(), Intel400xUnifiedState::DriveData); // Note: behavior.state_entry_called is not called with process_event_direct // assert!(behavior.state_entry_called); diff --git a/src/components/memory/intel_4001.rs b/src/components/memory/intel_4001.rs index c0b885b..d435040 100644 --- a/src/components/memory/intel_4001.rs +++ b/src/components/memory/intel_4001.rs @@ -1179,15 +1179,6 @@ mod tests { phi1_guard.set_driver(Some("TEST".to_string()), PinValue::High); } - // Debug: Check pin states before update - println!( - "DEBUG: Before update - SYNC: {:?}, CM: {:?}, CI: {:?}, PHI1: {:?}", - sync_pin.lock().unwrap().read(), - cm_pin.lock().unwrap().read(), - ci_pin.lock().unwrap().read(), - phi1_pin.lock().unwrap().read() - ); - // Debug: Check conditions that would trigger memory operation let sync = rom.read_sync_pin(); let chip_select = rom.read_cm_rom_pin(); @@ -1200,20 +1191,6 @@ mod tests { sync && chip_select && !io_select ); - // Debug: Check edge detection - println!("DEBUG: Before update - prev_phi1: {:?}", rom.prev_phi1); - - // Debug: Check what read_clock_pins returns - let (read_phi1, _) = rom.read_clock_pins(); - println!("DEBUG: read_clock_pins() returns PHI1: {:?}", read_phi1); - - // Debug: Check edge detection logic manually - let phi1_rising = read_phi1 == PinValue::High && rom.prev_phi1 == PinValue::Low; - println!( - "DEBUG: Manual edge detection - PHI1: {:?}, prev_phi1: {:?}, rising: {}", - read_phi1, rom.prev_phi1, phi1_rising - ); - // Update to process Φ1 rising edge rom.update();