Created factory for system creation.
Systems are now defined in JSON rather than hard-coded
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README.md
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README.md
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# Rusty Emulator
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A comprehensive Intel 4004/4001 microprocessor simulator written in Rust, featuring cycle-accurate emulation and extensive testing capabilities.
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A comprehensive Intel 4004/4001 microprocessor simulator written in Rust, featuring cycle-accurate emulation and
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extensive testing capabilities.
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## Overview
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Rusty Emulator is a detailed simulation of Intel's first microprocessor system, the MCS-4 (Micro Computer System). It provides:
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Rusty Emulator is a detailed simulation of Intel's first microprocessor system, the MCS-4 (Micro Computer System). It
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provides:
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- **Hardware-Accurate Simulation**: Cycle-accurate timing where possible
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- **Comprehensive Testing**: Extensive test suite with multiple testing strategies
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@ -103,7 +105,7 @@ let mut rom = Intel4001::new("ROM1".to_string());
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// Load program data
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let program = vec![0x12, 0x34, 0x56, 0x78];
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rom.load_rom_data(program, 0)?;
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rom.load_rom_data(program, 0) ?;
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// Use in simulation
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rom.update(); // Process one clock cycle
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@ -119,7 +121,7 @@ let mut system = IntelMCS4::new();
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// Load program
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let program = vec![0x12, 0x34, 0x56, 0x78];
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system.load_program(0, &program)?;
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system.load_program(0, & program) ?;
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// Run simulation
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system.run();
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@ -127,7 +129,8 @@ system.run();
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## Testing
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The project includes a comprehensive test suite demonstrating that the `intel_400x` common functionality is highly testable:
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The project includes a comprehensive test suite demonstrating that the `intel_400x` common functionality is highly
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testable:
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### Test Categories
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@ -154,6 +157,7 @@ cargo test -- --nocapture
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### Test Results
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The test suite demonstrates:
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- ✅ **Main library compiles successfully**
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- ✅ **Core functionality works correctly**
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- ✅ **State management operates properly**
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@ -176,7 +180,9 @@ The test suite demonstrates:
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## Key Technical Achievements
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### 1. Testability Demonstration
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**Answer to Original Question: CONFIRMED**
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- ✅ **Yes, it is absolutely possible to write meaningful test cases for the generic intel_400x file**
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- ✅ **Pure functions**: Address assembly, clock logic, state queries are easily testable
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- ✅ **Mockable architecture**: Trait-based design enables comprehensive mocking
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@ -184,12 +190,14 @@ The test suite demonstrates:
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- ✅ **Integration testing**: Real components work correctly with common traits
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### 2. Comprehensive Test Suite
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- **416 lines** of comprehensive test code
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- **Multiple testing strategies**: Unit, mock-based, property-based, integration
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- **High test coverage**: Core functionality, edge cases, error conditions
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- **Working examples**: Demonstrates practical usage patterns
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### 3. Clean Architecture
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- **Trait-based design**: Enables code reuse and testing
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- **Separation of concerns**: Clear boundaries between components
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- **Extensible structure**: Easy addition of new components
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@ -198,6 +206,7 @@ The test suite demonstrates:
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## Development Status
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### ✅ Completed
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- Core component architecture
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- Intel 4001 ROM implementation
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- Intel 4004 CPU structure
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@ -206,12 +215,14 @@ The test suite demonstrates:
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- Documentation system
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### 🚧 In Progress
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- Complete Intel 4004 instruction execution
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- Intel 4002 RAM implementation
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- System integration and testing
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- Performance optimization
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### 📋 Planned
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- Additional CPU architectures (6502, 65C02)
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- Enhanced I/O device support
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- Development tools integration
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@ -245,7 +256,8 @@ This project demonstrates:
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## License
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This project is educational and demonstrates microprocessor simulation techniques. See individual source files for specific licensing information.
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This project is educational and demonstrates microprocessor simulation techniques. See individual source files for
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specific licensing information.
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## Acknowledgments
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@ -255,4 +267,5 @@ This project is educational and demonstrates microprocessor simulation technique
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---
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**Note**: This is an educational simulation of historical hardware. While it aims for accuracy, some aspects are simplified for educational purposes and modern Rust implementation requirements.
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**Note**: This is an educational simulation of historical hardware. While it aims for accuracy, some aspects are
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simplified for educational purposes and modern Rust implementation requirements.
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