Created factory for system creation.
Systems are now defined in JSON rather than hard-coded
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# Intel 400x Common Functionality Tests
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This directory contains comprehensive tests for the `intel_400x.rs` common functionality module, which provides shared timing, clock handling, and bus operations for Intel 400x series chips.
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This directory contains comprehensive tests for the `intel_400x.rs` common functionality module, which provides shared
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timing, clock handling, and bus operations for Intel 400x series chips.
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## Test Organization
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### Unit Tests (in implementation files)
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- **Intel4001 unit tests**: Located in `src/components/memory/intel_4001.rs`
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- Component creation and configuration
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- Memory operations and data loading
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- State management and transitions
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- Error handling and edge cases
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- Component creation and configuration
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- Memory operations and data loading
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- State management and transitions
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- Error handling and edge cases
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### Integration Tests (in tests/ directory)
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1. **`intel_400x_tests.rs`** - Tests for the common intel_400x functionality
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2. **`mocks.rs`** - Mock implementations for testing hardware interactions
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3. **`mock_based_tests.rs`** - Tests using mocks for data bus and pin operations
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@ -23,6 +26,7 @@ This directory contains comprehensive tests for the `intel_400x.rs` common funct
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### Test Categories
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#### 1. Common Functionality Tests (`intel_400x_tests.rs`)
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- **Timing Constants**: Verify access times and setup requirements
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- **Address Assembly**: Test nibble-to-address conversion logic
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- **State Machine**: Test state transition logic and queries
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- **Utility Functions**: Test helper functions and pin operations
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#### 2. Mock-Based Tests (`mock_based_tests.rs`)
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- **Data Bus Operations**: Test read/write operations with controlled inputs
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- **Clock Handling**: Test clock pin interactions and edge scenarios
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- **Control Pins**: Test SYNC, CM, and RESET pin behavior
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@ -38,6 +43,7 @@ This directory contains comprehensive tests for the `intel_400x.rs` common funct
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- **Error Handling**: Test behavior with invalid inputs
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#### 3. Property-Based Tests (`property_based_tests.rs`)
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- **State Machine Invariants**: Verify state consistency properties
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- **Type Conversions**: Test enum conversion roundtrips
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- **Address Properties**: Test address assembly properties
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@ -45,12 +51,14 @@ This directory contains comprehensive tests for the `intel_400x.rs` common funct
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- **Concurrency Safety**: Test thread-safe behavior
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#### 4. Integration Tests (`integration_tests.rs`)
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- **Trait Implementation**: Verify concrete types implement traits correctly
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- **Cross-Component Compatibility**: Test multiple components work together
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- **Real Component Testing**: Test with actual Intel4001 implementation
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- **Lifecycle Testing**: Test component initialization and cleanup
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#### 5. Working Tests (`working_test.rs`)
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- **Core Functionality**: Demonstrates that the intel_400x module is testable
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- **Basic Operations**: Tests fundamental features that work correctly
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- **Regression Prevention**: Ensures core functionality remains stable
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@ -58,11 +66,13 @@ This directory contains comprehensive tests for the `intel_400x.rs` common funct
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## Running the Tests
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### Run All Tests
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```bash
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cargo test
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```
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### Run Specific Test Categories
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```bash
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# Unit tests only
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cargo test intel_400x_tests
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```
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### Run with Detailed Output
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```bash
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cargo test -- --nocapture
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```
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### Run Specific Test
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```bash
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cargo test test_name
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```
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@ -93,6 +105,7 @@ cargo test test_name
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## Test Architecture
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### Mock System
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The test suite includes a comprehensive mock system that provides:
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- **MockPin**: Simulates pin behavior with operation counting
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@ -101,6 +114,7 @@ The test suite includes a comprehensive mock system that provides:
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- **MockTimeProvider**: Deterministic time source for timing tests
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### Property-Based Testing
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Uses `proptest` to verify:
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- State machine invariants hold for all inputs
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@ -109,6 +123,7 @@ Uses `proptest` to verify:
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- Timing constraints are maintained
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### Integration Testing
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Tests verify that:
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- Concrete implementations (like Intel4001) correctly use the common traits
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@ -118,28 +133,33 @@ Tests verify that:
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## Key Testing Areas
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### 1. Timing and Clock Logic
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- Clock edge detection accuracy
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- Two-phase clock handling
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- Access time simulation
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- State machine timing
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### 2. Address Handling
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- Nibble assembly into full addresses
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- Address latching during clock phases
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- Address validation and bounds checking
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### 3. Data Bus Operations
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- 4-bit data bus read/write operations
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- Bus tri-stating for contention avoidance
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- Bit-level manipulation and verification
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### 4. State Machine Verification
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- State transition correctness
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- State invariant preservation
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- Reset behavior verification
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- Error state handling
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### 5. Hardware Abstraction
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- Pin operation safety
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- Driver management
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- Hardware timing simulation
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