Fix Intel 4004 CPU emulation bugs: opcode mapping, JCN conditions, DAA carry

- Remap opcodes 0x01-0x0F from duplicate LD to Invalid (undefined on real hardware)
- Fix JCN condition bit mapping per datasheet: C1=Carry, C2=ACC zero, C3=TEST pin
- Fix DAA instruction to clear carry when no 4-bit overflow occurs
- Rewrite fibonacci demo program with correct opcodes (FIM, CLB, LD, ADD, WRM, XCH, ISZ)
- Regenerate fibonacci.bin and fibonacci_output.bin with correct opcodes
- Update all tests to match corrected JCN condition codes
- Update plan document and README to reflect changes

tests/fibonacci_test.rs

@@ -374,12 +374,11 @@ fn test_isz_instruction() {
 #[test]
 fn test_jcn_instruction() {
     // LDM 0 (0xD0) → ACC=0
-    // JCN 0x04, 0x00 → jump if ACC zero → should jump to 0x00
-    // But we want to test fall-through too:
+    // JCN 0x02, 0x00 → jump if ACC zero (bit 1 = ACC zero per datasheet)
     
     let program = vec![
         0xD0,        // LDM 0 → ACC=0
-        0x14, 0x00,  // JCN 0x4 (ACC zero), addr 0x00 → jump taken
+        0x12, 0x00,  // JCN 0x2 (ACC zero), addr 0x00 → jump taken
     ];
     
     let mut sys = TestSystem::new(&program);
@@ -400,11 +399,11 @@ fn test_jcn_instruction() {
 #[test]
 fn test_jcn_not_taken() {
     // LDM 5 (0xD5) → ACC=5 (not zero)
-    // JCN 0x04, 0x00 → jump if ACC zero → should NOT jump
+    // JCN 0x02, 0x00 → jump if ACC zero → should NOT jump
     
     let program = vec![
         0xD5,        // LDM 5 → ACC=5
-        0x14, 0x00,  // JCN 0x4 (ACC zero), addr 0x00 → NOT taken
+        0x12, 0x00,  // JCN 0x2 (ACC zero), addr 0x00 → NOT taken
         0xD0,        // LDM 0 → ACC=0 (should reach here)
     ];