New implementation with threads per component

This commit is contained in:
Jan-Peter von Hunnius 2025-09-22 09:32:42 +02:00
parent ac8ebbafe9
commit bfbddda58c
15 changed files with 170 additions and 265 deletions

View file

@ -1,25 +1,23 @@
use std::collections::HashMap;
use crate::{PinValue, BaseComponent, Component, Pin};
use std::sync::Arc;
use crate::component::{BaseComponent, Component};
use crate::pin::{Pin, PinValue};
// Simple 4-bit and 12-bit types for the 4004
#[derive(Debug, Clone, Copy)]
struct u4(u8);
#[derive(Debug, Clone, Copy)]
struct u12(u16);
impl u4 {
fn wrapping_add(self, other: u4) -> u4 {
u4((self.0 + other.0) & 0xF)
}
}
impl u12 {
fn wrapping_add(self, other: u12) -> u12 {
u12((self.0 + other.0) & 0xFFF)
}
}
#[derive(Clone)]
pub struct Intel4004 {
base: BaseComponent,
@ -27,7 +25,6 @@ pub struct Intel4004 {
accumulator: u4,
last_clock_state: PinValue,
}
impl Intel4004 {
pub fn new(name: String) -> Self {
let mut base = BaseComponent::new(name);
@ -44,15 +41,12 @@ impl Intel4004 {
last_clock_state: PinValue::Low,
}
}
pub fn clk(&self) -> Option<Arc<Pin>> {
self.base.get_pin("clk")
}
pub fn reset(&self) -> Option<Arc<Pin>> {
self.base.get_pin("reset")
}
pub fn data(&self) -> Option<Arc<Pin>> {
self.base.get_pin("data")
}
@ -62,19 +56,12 @@ impl Component for Intel4004 {
fn name(&self) -> &str {
self.base.name()
}
fn pins(&self) -> &HashMap<String, Arc<Pin>> {
self.base.pins()
}
fn get_pin(&self, name: &str) -> Option<Arc<Pin>> {
self.base.get_pin(name)
}
fn connect_pin(&mut self, pin_name: &str, other_pin: Arc<Pin>) -> Result<(), String> {
self.base.connect_pin(pin_name, other_pin)
}
fn update(&mut self) -> Result<(), String> {
// Read clock pin (check if any connected component is driving it low)
let clk_pin = self.base.pins.get("clk").unwrap();
@ -103,11 +90,9 @@ impl Component for Intel4004 {
self.last_clock_state = clk_value;
Ok(())
}
fn run(&mut self) {
self.base.run();
}
fn stop(&mut self) {
self.base.stop();
}