New implementation with threads per component
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15 changed files with 170 additions and 265 deletions
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@ -1,25 +1,23 @@
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use std::collections::HashMap;
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use crate::{PinValue, BaseComponent, Component, Pin};
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use std::sync::Arc;
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use crate::component::{BaseComponent, Component};
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use crate::pin::{Pin, PinValue};
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// Simple 4-bit and 12-bit types for the 4004
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#[derive(Debug, Clone, Copy)]
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struct u4(u8);
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#[derive(Debug, Clone, Copy)]
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struct u12(u16);
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impl u4 {
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fn wrapping_add(self, other: u4) -> u4 {
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u4((self.0 + other.0) & 0xF)
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}
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}
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impl u12 {
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fn wrapping_add(self, other: u12) -> u12 {
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u12((self.0 + other.0) & 0xFFF)
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}
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}
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#[derive(Clone)]
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pub struct Intel4004 {
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base: BaseComponent,
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@ -27,7 +25,6 @@ pub struct Intel4004 {
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accumulator: u4,
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last_clock_state: PinValue,
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}
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impl Intel4004 {
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pub fn new(name: String) -> Self {
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let mut base = BaseComponent::new(name);
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@ -44,15 +41,12 @@ impl Intel4004 {
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last_clock_state: PinValue::Low,
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}
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}
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pub fn clk(&self) -> Option<Arc<Pin>> {
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self.base.get_pin("clk")
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}
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pub fn reset(&self) -> Option<Arc<Pin>> {
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self.base.get_pin("reset")
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}
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pub fn data(&self) -> Option<Arc<Pin>> {
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self.base.get_pin("data")
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}
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@ -62,19 +56,12 @@ impl Component for Intel4004 {
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fn name(&self) -> &str {
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self.base.name()
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}
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fn pins(&self) -> &HashMap<String, Arc<Pin>> {
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self.base.pins()
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}
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fn get_pin(&self, name: &str) -> Option<Arc<Pin>> {
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self.base.get_pin(name)
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}
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fn connect_pin(&mut self, pin_name: &str, other_pin: Arc<Pin>) -> Result<(), String> {
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self.base.connect_pin(pin_name, other_pin)
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}
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fn update(&mut self) -> Result<(), String> {
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// Read clock pin (check if any connected component is driving it low)
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let clk_pin = self.base.pins.get("clk").unwrap();
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@ -103,11 +90,9 @@ impl Component for Intel4004 {
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self.last_clock_state = clk_value;
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Ok(())
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}
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fn run(&mut self) {
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self.base.run();
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}
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fn stop(&mut self) {
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self.base.stop();
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}
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