fix: RESET pin active-LOW and clock edge state reset
This commit is contained in:
parent
1cf2cd6e2b
commit
c9f39aa600
12 changed files with 520 additions and 327 deletions
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@ -396,21 +396,22 @@ mod tests {
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assert_eq!(d2_pin.lock().unwrap().read(), PinValue::HighZ);
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assert_eq!(d3_pin.lock().unwrap().read(), PinValue::HighZ);
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// Test reset
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// Test reset (RESET is active LOW)
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println!("=== Testing Reset ===");
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{
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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rom.update();
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assert_eq!(rom.get_timing_state(), TimingState::Idle);
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assert_eq!(rom.get_io_mode(), IoMode::Input);
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// Set reset low
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// Release reset (set HIGH for normal operation)
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{
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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rom.update();
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// Test memory read at address 0x00
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println!("=== Memory Access Testing: Address 0x00 ===");
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@ -427,7 +428,7 @@ mod tests {
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println!("=== Memory Access Testing: Address 0xFF ===");
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test_memory_read(
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&mut rom, &sync_pin, &cm_pin, &ci_pin, &phi1_pin, &phi2_pin, &d0_pin, &d1_pin, &d2_pin,
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&d3_pin, 0xFF, 0x0F, // 4-bit value (low nibble only)
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&d3_pin, 0xFF, 0x0F, // 4-bit value (low nibble only)
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);
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// Test I/O operations
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@ -437,19 +438,19 @@ mod tests {
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// - CM (chip_select) = HIGH
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// - CI (io_select) = HIGH
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// - Proper clock edges to trigger the operation
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// For this test, we'll verify the direct I/O port access methods work correctly
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// since full I/O timing simulation would require more complex test setup.
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// Test direct I/O port write (using set_io_port API)
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rom.set_io_mode(IoMode::Output);
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rom.set_io_port(0, 0x05).unwrap();
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assert_eq!(rom.get_io_port(0).unwrap(), 0x05);
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// Test I/O port read (using get_io_port API)
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rom.set_io_port(0, 0x0A).unwrap();
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assert_eq!(rom.get_io_port(0).unwrap(), 0x0A);
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// Test that I/O direction is set to Output when we write
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assert_eq!(rom.get_io_direction(0).unwrap(), IoDirection::Output);
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@ -484,17 +485,17 @@ mod tests {
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address: u8,
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expected_data: u8,
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) {
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// Reset to known state first
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// Reset to known state first (RESET is active LOW)
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{
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let reset_pin = rom.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset (active LOW)
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}
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rom.update();
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{
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let reset_pin = rom.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset (HIGH = normal operation)
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}
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rom.update();
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@ -716,8 +717,18 @@ mod tests {
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let test_data = vec![expected_data];
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chip.load_rom_data(test_data, addr).unwrap();
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test_memory_read(
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&mut chip, &sync_pin, &cm_pin, &ci_pin, &phi1_pin, &phi2_pin, &d0_pin, &d1_pin,
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&d2_pin, &d3_pin, addr as u8, expected_data,
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&mut chip,
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&sync_pin,
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&cm_pin,
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&ci_pin,
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&phi1_pin,
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&phi2_pin,
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&d0_pin,
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&d1_pin,
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&d2_pin,
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&d3_pin,
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addr as u8,
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expected_data,
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);
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}
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@ -1096,8 +1107,9 @@ mod tests {
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expected_data: u8,
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) -> u8 {
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// Load the expected data into ROM at the specified address
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chip.load_rom_data(vec![expected_data], address as usize).unwrap();
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chip.load_rom_data(vec![expected_data], address as usize)
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.unwrap();
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// Reset to known state
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chip.perform_reset();
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chip.update();
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@ -1283,8 +1295,9 @@ mod tests {
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.set_settlement_time(Duration::from_nanos(0));
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// Test memory read at maximum timing
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// Note: Intel 4004 has a 4-bit data bus, so we can only read 4 bits at a time
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let address = 0x23;
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let expected_data = 0x45;
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let expected_data = 0x05; // 4-bit value (low nibble only)
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// Set up ROM data
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chip.load_rom_data(vec![expected_data], address).unwrap();
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@ -1704,17 +1717,17 @@ mod tests {
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address: u16,
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_expected_data: u8,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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chip.update();
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@ -1874,8 +1887,9 @@ mod tests {
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.set_settlement_time(Duration::from_nanos(0));
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// Test address setup time (minimum 100ns before PHI2 rising edge)
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// Note: Intel 4004 has a 4-bit data bus, so we can only read 4 bits at a time
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let address = 0x34;
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let expected_data = 0x56;
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let expected_data = 0x06; // 4-bit value (low nibble only)
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// Set up ROM data
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chip.load_rom_data(vec![expected_data], address).unwrap();
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@ -2167,17 +2181,17 @@ mod tests {
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address: u16,
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setup_time_ns: u64,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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chip.update();
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@ -2287,17 +2301,17 @@ mod tests {
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address: u16,
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hold_time_ns: u64,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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chip.update();
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@ -2408,17 +2422,17 @@ mod tests {
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setup_time_ns: u64,
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hold_time_ns: u64,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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chip.update();
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@ -2531,17 +2545,17 @@ mod tests {
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address: u16,
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phase: &str,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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chip.update();
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@ -2704,17 +2718,17 @@ mod tests {
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address: u16,
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nibble_delay_ns: u64,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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chip.update();
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@ -2824,17 +2838,17 @@ mod tests {
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address: u16,
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setup_time_ns: u64,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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chip.update();
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@ -2951,17 +2965,17 @@ mod tests {
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setup_time_ns: u64,
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clock_period_ns: u64,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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chip.update();
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@ -3127,8 +3141,9 @@ mod tests {
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.set_settlement_time(Duration::from_nanos(0));
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// Test memory read with focus on clock edge relationships
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// Note: Intel 4004 has a 4-bit data bus, so we can only read 4 bits at a time
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let address = 0x45;
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let expected_data = 0x67;
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let expected_data = 0x07; // 4-bit value (low nibble only)
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// Set up ROM data
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chip.load_rom_data(vec![expected_data], address).unwrap();
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@ -3526,17 +3541,17 @@ mod tests {
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phi2_pin: &Arc<Mutex<Pin>>,
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address: u16,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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chip.update();
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@ -3648,17 +3663,17 @@ mod tests {
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phi2_pin: &Arc<Mutex<Pin>>,
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address: u16,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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chip.update();
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@ -3770,17 +3785,17 @@ mod tests {
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phi2_pin: &Arc<Mutex<Pin>>,
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address: u16,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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chip.update();
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@ -3893,17 +3908,17 @@ mod tests {
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address: u16,
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spacing_ns: u64,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
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}
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chip.update();
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@ -4010,17 +4025,17 @@ mod tests {
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address: u16,
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jitter_ns: i64,
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) -> u8 {
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// Reset to known state
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// Reset to known state (RESET is active LOW)
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
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}
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chip.update();
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{
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let reset_pin = chip.get_pin("RESET").unwrap();
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let mut reset_guard = reset_pin.lock().unwrap();
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
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reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
|
||||
}
|
||||
chip.update();
|
||||
|
||||
|
|
@ -4163,17 +4178,17 @@ mod tests {
|
|||
address: u16,
|
||||
spacing_ns: u64,
|
||||
) -> u8 {
|
||||
// Reset to known state
|
||||
// Reset to known state (RESET is active LOW)
|
||||
{
|
||||
let reset_pin = chip.get_pin("RESET").unwrap();
|
||||
let mut reset_guard = reset_pin.lock().unwrap();
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset
|
||||
}
|
||||
chip.update();
|
||||
{
|
||||
let reset_pin = chip.get_pin("RESET").unwrap();
|
||||
let mut reset_guard = reset_pin.lock().unwrap();
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset
|
||||
}
|
||||
chip.update();
|
||||
|
||||
|
|
@ -4280,17 +4295,17 @@ mod tests {
|
|||
address: u16,
|
||||
sequence: &str,
|
||||
) -> u8 {
|
||||
// Reset to known state
|
||||
// Reset to known state (RESET is active LOW)
|
||||
{
|
||||
let reset_pin = chip.get_pin("RESET").unwrap();
|
||||
let mut reset_guard = reset_pin.lock().unwrap();
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset (active LOW)
|
||||
}
|
||||
chip.update();
|
||||
{
|
||||
let reset_pin = chip.get_pin("RESET").unwrap();
|
||||
let mut reset_guard = reset_pin.lock().unwrap();
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset (HIGH = normal operation)
|
||||
}
|
||||
chip.update();
|
||||
|
||||
|
|
@ -4516,17 +4531,17 @@ mod tests {
|
|||
address: u16,
|
||||
duty_cycle_percent: u8,
|
||||
) -> u8 {
|
||||
// Reset to known state
|
||||
// Reset to known state (RESET is active LOW)
|
||||
{
|
||||
let reset_pin = chip.get_pin("RESET").unwrap();
|
||||
let mut reset_guard = reset_pin.lock().unwrap();
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset (active LOW)
|
||||
}
|
||||
chip.update();
|
||||
{
|
||||
let reset_pin = chip.get_pin("RESET").unwrap();
|
||||
let mut reset_guard = reset_pin.lock().unwrap();
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset (HIGH = normal operation)
|
||||
}
|
||||
chip.update();
|
||||
|
||||
|
|
@ -4646,17 +4661,17 @@ mod tests {
|
|||
address: u16,
|
||||
frequency_hz: u64,
|
||||
) -> u8 {
|
||||
// Reset to known state
|
||||
// Reset to known state (RESET is active LOW)
|
||||
{
|
||||
let reset_pin = chip.get_pin("RESET").unwrap();
|
||||
let mut reset_guard = reset_pin.lock().unwrap();
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset (active LOW)
|
||||
}
|
||||
chip.update();
|
||||
{
|
||||
let reset_pin = chip.get_pin("RESET").unwrap();
|
||||
let mut reset_guard = reset_pin.lock().unwrap();
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset (HIGH = normal operation)
|
||||
}
|
||||
chip.update();
|
||||
|
||||
|
|
@ -4766,17 +4781,17 @@ mod tests {
|
|||
|
||||
// Helper function for testing access time tolerance
|
||||
fn test_access_time_tolerance(chip: &mut Intel4001, address: u16, _expected_data: u8) -> u8 {
|
||||
// Reset to known state
|
||||
// Reset to known state (RESET is active LOW)
|
||||
{
|
||||
let reset_pin = chip.get_pin("RESET").unwrap();
|
||||
let mut reset_guard = reset_pin.lock().unwrap();
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset (active LOW)
|
||||
}
|
||||
chip.update();
|
||||
{
|
||||
let reset_pin = chip.get_pin("RESET").unwrap();
|
||||
let mut reset_guard = reset_pin.lock().unwrap();
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset (HIGH = normal operation)
|
||||
}
|
||||
chip.update();
|
||||
|
||||
|
|
@ -4891,17 +4906,17 @@ mod tests {
|
|||
_expected_data: u8,
|
||||
timing_variation_ns: u64,
|
||||
) -> u8 {
|
||||
// Reset to known state
|
||||
// Reset to known state (RESET is active LOW)
|
||||
{
|
||||
let reset_pin = chip.get_pin("RESET").unwrap();
|
||||
let mut reset_guard = reset_pin.lock().unwrap();
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::High);
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low); // Assert reset (active LOW)
|
||||
}
|
||||
chip.update();
|
||||
{
|
||||
let reset_pin = chip.get_pin("RESET").unwrap();
|
||||
let mut reset_guard = reset_pin.lock().unwrap();
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::Low);
|
||||
reset_guard.set_driver(Some("TEST".to_string()), PinValue::High); // Release reset (HIGH = normal operation)
|
||||
}
|
||||
chip.update();
|
||||
|
||||
|
|
@ -6120,7 +6135,7 @@ mod tests {
|
|||
|
||||
// Test memory read with various timing tolerances
|
||||
let address = 0x78;
|
||||
let expected_data = 0x9A;
|
||||
let expected_data = 0x0A; // 4-bit value (low nibble only)
|
||||
|
||||
// Set up ROM data
|
||||
chip.load_rom_data(vec![expected_data], address).unwrap();
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue