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c9f39aa600
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fix: RESET pin active-LOW and clock edge state reset
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2026-02-26 11:04:25 +01:00 |
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1cf2cd6e2b
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fix: address latching timing and cleanup debug code
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2026-02-25 11:55:16 +01:00 |
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20884b57c3
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feat(cpu): add A1/A2/A3 address cycle timing and fix pin propagation
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2026-02-24 18:58:14 +01:00 |
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633463e370
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Unified the 400x state machine for address latching
Fixed timing issues
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2025-11-14 18:51:10 +01:00 |
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e17d6ad177
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Added debug output
Added GUI
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2025-10-03 11:44:55 +02:00 |
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0278a96a8d
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Added console for displaying the system state
Corrected behaviour and tests
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2025-09-29 19:02:00 +02:00 |
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6f3295dc5e
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Created factory for system creation.
Systems are now defined in JSON rather than hard-coded
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2025-09-29 12:41:16 +02:00 |
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c039e9069a
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Added more tests
Extracted common 400x behavior like timing and latching into common module
Added maxed MCS-4
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2025-09-29 11:53:46 +02:00 |
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