354 lines
11 KiB
Rust
354 lines
11 KiB
Rust
use rusty_emu::component::{BaseComponent, Component};
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use rusty_emu::components::common::intel_400x::*;
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use rusty_emu::pin::PinValue;
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use std::collections::HashMap;
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use std::sync::{Arc, Mutex};
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use std::time::{Duration, Instant};
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// Mock component for testing trait implementations
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#[derive(Debug)]
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struct MockComponent {
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pins: HashMap<String, Arc<Mutex<TestPin>>>,
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}
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#[derive(Debug)]
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struct TestPin {
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value: PinValue,
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driver: Option<(String, PinValue)>,
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}
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type Pin = TestPin;
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impl Pin {
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fn set_driver(&mut self, driver: Option<String>, value: PinValue) {
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self.driver = driver.map(|name| (name, value));
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self.value = value;
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}
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}
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impl MockComponent {
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fn new() -> Self {
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Self {
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pins: HashMap::new(),
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}
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}
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fn add_pin(&mut self, name: &str, pin: Arc<Mutex<Pin>>) {
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self.pins.insert(name.to_string(), pin);
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}
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fn get_pin(&self, name: &str) -> Result<Arc<Mutex<TestPin>>, String> {
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self.pins
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.get(name)
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.cloned()
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.ok_or_else(|| format!("Pin {} not found", name))
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}
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}
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impl Component for MockComponent {
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fn name(&self) -> String {
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"MockComponent".to_string()
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}
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fn pins(&self) -> HashMap<String, Arc<Mutex<rusty_emu::pin::Pin>>> {
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HashMap::new()
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}
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fn get_pin(&self, name: &str) -> Result<Arc<Mutex<rusty_emu::pin::Pin>>, String> {
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// For testing, we'll return an error since we don't have real pins
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Err(format!("Mock pin not implemented for {}", name))
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}
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fn update(&mut self) {
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// No-op for mock
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}
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fn run(&mut self) {
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// No-op for mock
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}
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fn stop(&mut self) {
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// No-op for mock
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}
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fn is_running(&self) -> bool {
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false
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}
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}
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impl Intel400xAddressHandling for MockComponent {
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fn get_base(&self) -> &BaseComponent {
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unimplemented!("MockComponent doesn't contain BaseComponent")
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}
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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#[test]
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fn test_timing_constants() {
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// Test that timing constants have expected values
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assert_eq!(
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TimingConstants::DEFAULT_ACCESS_TIME,
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Duration::from_nanos(500)
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);
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assert_eq!(TimingConstants::FAST_ACCESS_TIME, Duration::from_nanos(200));
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assert_eq!(TimingConstants::ADDRESS_SETUP, Duration::from_nanos(100));
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assert_eq!(TimingConstants::DATA_VALID, Duration::from_nanos(200));
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}
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#[test]
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fn test_assemble_full_address() {
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// Create a mock trait implementation for testing
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struct TestAddressHandler {
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base: MockComponent,
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}
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impl TestAddressHandler {
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fn new() -> Self {
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Self {
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base: MockComponent::new(),
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}
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}
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}
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impl Intel400xAddressHandling for TestAddressHandler {
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fn get_base(&self) -> &BaseComponent {
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unimplemented!("TestAddressHandler doesn't contain BaseComponent")
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}
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}
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let handler = TestAddressHandler::new();
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// Test address assembly with valid nibbles
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assert_eq!(
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handler.assemble_full_address(Some(0x0F), Some(0x03)),
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Some(0xF3)
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);
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assert_eq!(
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handler.assemble_full_address(Some(0x02), Some(0x04)),
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Some(0x24)
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);
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assert_eq!(
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handler.assemble_full_address(Some(0x00), Some(0x00)),
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Some(0x00)
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);
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assert_eq!(
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handler.assemble_full_address(Some(0x0F), Some(0x0F)),
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Some(0xFF)
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);
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// Test with missing nibbles
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assert_eq!(handler.assemble_full_address(None, Some(0x23)), None);
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assert_eq!(handler.assemble_full_address(Some(0x0F), None), None);
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assert_eq!(handler.assemble_full_address(None, None), None);
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}
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#[test]
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fn test_timing_state_machine() {
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// Test state machine properties
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let idle_state = TimingState::Idle;
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let address_state = TimingState::AddressPhase;
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let wait_state = TimingState::WaitLatency;
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let drive_state = TimingState::DriveData;
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// Test state queries
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assert!(idle_state.is_idle());
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assert!(!idle_state.is_address_phase());
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assert!(!idle_state.is_waiting_latency());
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assert!(!idle_state.is_driving_data());
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assert!(!address_state.is_idle());
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assert!(address_state.is_address_phase());
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assert!(!address_state.is_waiting_latency());
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assert!(!address_state.is_driving_data());
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assert!(!wait_state.is_idle());
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assert!(!wait_state.is_address_phase());
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assert!(wait_state.is_waiting_latency());
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assert!(!wait_state.is_driving_data());
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assert!(!drive_state.is_idle());
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assert!(!drive_state.is_address_phase());
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assert!(!drive_state.is_waiting_latency());
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assert!(drive_state.is_driving_data());
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}
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#[test]
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fn test_memory_state_conversions() {
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// Test conversions between MemoryState and TimingState
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let mem_idle = MemoryState::Idle;
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let timing_idle: TimingState = mem_idle.into();
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assert_eq!(timing_idle, TimingState::Idle);
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let mem_address = MemoryState::AddressPhase;
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let timing_address: TimingState = mem_address.into();
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assert_eq!(timing_address, TimingState::AddressPhase);
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let mem_wait = MemoryState::WaitLatency;
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let timing_wait: TimingState = mem_wait.into();
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assert_eq!(timing_wait, TimingState::WaitLatency);
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let mem_drive = MemoryState::DriveData;
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let timing_drive: TimingState = mem_drive.into();
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assert_eq!(timing_drive, TimingState::DriveData);
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// Test reverse conversions
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let back_to_mem: MemoryState = timing_idle.into();
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assert_eq!(back_to_mem, MemoryState::Idle);
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}
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#[test]
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fn test_ram_state_conversions() {
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// Test conversions between RamState and TimingState
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let ram_idle = RamState::Idle;
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let timing_idle: TimingState = ram_idle.into();
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assert_eq!(timing_idle, TimingState::Idle);
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let ram_read = RamState::ReadData;
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let timing_drive: TimingState = ram_read.into();
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assert_eq!(timing_drive, TimingState::DriveData);
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let ram_write = RamState::WriteData;
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let timing_drive: TimingState = ram_write.into();
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assert_eq!(timing_drive, TimingState::DriveData);
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let ram_output = RamState::OutputPort;
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let timing_drive: TimingState = ram_output.into();
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assert_eq!(timing_drive, TimingState::DriveData);
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}
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#[test]
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fn test_utils_create_driver_name() {
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assert_eq!(create_driver_name("COMP1", "DATA"), "COMP1_DATA");
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assert_eq!(create_driver_name("MEMORY", "ADDR"), "MEMORY_ADDR");
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assert_eq!(create_driver_name("CPU", "CONTROL"), "CPU_CONTROL");
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}
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#[test]
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fn test_data_bus_bit_operations() {
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// Test bit manipulation for data bus operations
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let test_values = vec![
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(0x00, [false, false, false, false]),
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(0x01, [true, false, false, false]),
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(0x02, [false, true, false, false]),
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(0x04, [false, false, true, false]),
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(0x08, [false, false, false, true]),
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(0x05, [true, false, true, false]),
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(0x0A, [false, true, false, true]),
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(0x0F, [true, true, true, true]),
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];
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for (value, expected_bits) in test_values {
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// Test bit extraction (reading from bus)
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for i in 0..4 {
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let bit_value = (value >> i) & 1;
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assert_eq!(bit_value == 1, expected_bits[i as usize]);
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}
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// Test bit setting (writing to bus)
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let mut reconstructed = 0;
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for i in 0..4 {
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if expected_bits[i as usize] {
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reconstructed |= 1 << i;
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}
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}
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assert_eq!(value, reconstructed);
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}
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}
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#[test]
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fn test_address_latching_logic() {
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// Test the address latching algorithm
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let mut high_nibble: Option<u8> = None;
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let mut low_nibble: Option<u8> = None;
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let mut full_address_ready = false;
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let mut address_latch_time: Option<Instant> = None;
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let access_time = Duration::from_nanos(100);
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// Mock address handler for testing the algorithm
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struct TestAddressHandler {
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base: MockComponent,
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}
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impl TestAddressHandler {
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fn new() -> Self {
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Self {
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base: MockComponent::new(),
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}
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}
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}
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impl Intel400xAddressHandling for TestAddressHandler {
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fn get_base(&self) -> &BaseComponent {
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unimplemented!("TestAddressHandler doesn't contain BaseComponent")
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}
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}
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let handler = TestAddressHandler::new();
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// First cycle: high nibble
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handler.handle_address_latching(
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0x12,
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&mut high_nibble,
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&mut low_nibble,
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&mut full_address_ready,
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&mut address_latch_time,
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access_time,
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);
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assert_eq!(high_nibble, Some(0x12));
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assert_eq!(low_nibble, None);
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assert_eq!(full_address_ready, false);
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assert_eq!(address_latch_time, None);
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// Second cycle: low nibble
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handler.handle_address_latching(
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0x34,
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&mut high_nibble,
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&mut low_nibble,
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&mut full_address_ready,
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&mut address_latch_time,
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access_time,
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);
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assert_eq!(high_nibble, None); // Should be cleared
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assert_eq!(low_nibble, None); // Should be cleared
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assert_eq!(full_address_ready, true);
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assert!(address_latch_time.is_some());
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// Verify the assembled address
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let assembled = handler.assemble_full_address(Some(0x02), Some(0x04));
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assert_eq!(assembled, Some(0x24));
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}
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#[test]
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fn test_latency_timing_logic() {
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let access_time = Duration::from_nanos(100);
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// Test with no latch time (should return false)
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assert_eq!(
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Intel400xAddressHandling::handle_latency_wait(
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&MockComponent::new(),
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&None,
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access_time
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),
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false
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);
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// Test with recent latch time (should return false if not enough time elapsed)
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let recent_time = Some(Instant::now());
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assert_eq!(
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Intel400xAddressHandling::handle_latency_wait(
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&MockComponent::new(),
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&recent_time,
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access_time
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),
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true
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);
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// Note: Testing with elapsed time would require sleeping or mocking time
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// This demonstrates the logic structure is correct
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}
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}
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