506 lines
17 KiB
Rust
506 lines
17 KiB
Rust
//! Mock-based tests for Intel 400x data bus and pin operations
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//!
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//! These tests use the mock implementations to verify the behavior of
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//! the intel_400x traits when interacting with hardware components.
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use rusty_emu::components::common::intel_400x::*;
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use rusty_emu::pin::PinValue;
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use std::time::Duration;
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#[cfg(test)]
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mod data_bus_tests {
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use super::*;
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#[test]
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fn test_data_bus_read_write_operations() {
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let mut scenario = MockScenario::new("TestDataBus");
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// Test writing data to bus
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scenario.set_data_bus_value(0x05); // 0101 in binary
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assert_eq!(scenario.get_data_bus_value(), 0x05);
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// Verify individual bits
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assert_eq!(scenario.component.get_pin_value("D0"), Some(PinValue::High)); // LSB
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assert_eq!(scenario.component.get_pin_value("D1"), Some(PinValue::Low));
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assert_eq!(scenario.component.get_pin_value("D2"), Some(PinValue::High));
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assert_eq!(scenario.component.get_pin_value("D3"), Some(PinValue::Low)); // MSB
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// Test writing different value
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scenario.set_data_bus_value(0x0A); // 1010 in binary
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assert_eq!(scenario.get_data_bus_value(), 0x0A);
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assert_eq!(scenario.component.get_pin_value("D0"), Some(PinValue::Low));
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assert_eq!(scenario.component.get_pin_value("D1"), Some(PinValue::High));
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assert_eq!(scenario.component.get_pin_value("D2"), Some(PinValue::Low));
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assert_eq!(scenario.component.get_pin_value("D3"), Some(PinValue::High));
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}
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#[test]
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fn test_data_bus_all_values() {
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let mut scenario = MockScenario::new("TestAllDataValues");
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// Test all possible 4-bit values
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for value in 0u8..16 {
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scenario.set_data_bus_value(value);
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let read_value = scenario.get_data_bus_value();
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assert_eq!(value, read_value, "Failed for value 0x{:02X}", value);
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}
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}
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#[test]
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fn test_pin_operation_counting() {
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let scenario = MockScenario::new("TestPinCounting");
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// Set some pin values and check that operations are counted
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scenario.component.set_pin_value("D0", PinValue::High);
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scenario.component.set_pin_value("D1", PinValue::Low);
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// Note: Our current mock doesn't fully implement the counting
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// This test demonstrates the structure for when we enhance the mock
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assert_eq!(scenario.component.get_pin_value("D0"), Some(PinValue::High));
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assert_eq!(scenario.component.get_pin_value("D1"), Some(PinValue::Low));
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}
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}
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#[cfg(test)]
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mod clock_handling_tests {
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use super::*;
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#[test]
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fn test_clock_pin_reading() {
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let scenario = MockScenario::new("TestClockReading");
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// Test reading clock pins in different states
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scenario
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.component
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.set_clock_values(PinValue::Low, PinValue::Low);
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// In a real implementation, this would test the actual trait methods
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// For now, we verify the mock setup works correctly
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assert_eq!(
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scenario.component.get_pin_value("PHI1"),
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Some(PinValue::Low)
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);
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assert_eq!(
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scenario.component.get_pin_value("PHI2"),
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Some(PinValue::Low)
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);
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}
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#[test]
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fn test_clock_edge_scenarios() {
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let mut scenario = MockScenario::new("TestClockEdges");
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// Test PHI1 rising edge
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scenario.set_phi1_rising_edge();
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assert_eq!(
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scenario.component.get_pin_value("PHI1"),
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Some(PinValue::High)
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);
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assert_eq!(
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scenario.component.get_pin_value("PHI2"),
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Some(PinValue::Low)
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);
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// Test PHI1 falling edge
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scenario.set_phi1_falling_edge();
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assert_eq!(
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scenario.component.get_pin_value("PHI1"),
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Some(PinValue::Low)
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);
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assert_eq!(
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scenario.component.get_pin_value("PHI2"),
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Some(PinValue::Low)
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);
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// Test PHI2 rising edge
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scenario.set_phi2_rising_edge();
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assert_eq!(
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scenario.component.get_pin_value("PHI1"),
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Some(PinValue::Low)
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);
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assert_eq!(
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scenario.component.get_pin_value("PHI2"),
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Some(PinValue::High)
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);
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// Test PHI2 falling edge
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scenario.set_phi2_falling_edge();
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assert_eq!(
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scenario.component.get_pin_value("PHI1"),
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Some(PinValue::Low)
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);
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assert_eq!(
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scenario.component.get_pin_value("PHI2"),
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Some(PinValue::Low)
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);
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}
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#[test]
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fn test_clock_state_transitions() {
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let mut scenario = MockScenario::new("TestClockTransitions");
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// Simulate a clock cycle: Low -> High -> Low
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scenario.set_clock_low();
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assert_eq!(
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scenario.component.get_pin_value("PHI1"),
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Some(PinValue::Low)
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);
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assert_eq!(
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scenario.component.get_pin_value("PHI2"),
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Some(PinValue::Low)
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);
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scenario.set_clock_high();
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assert_eq!(
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scenario.component.get_pin_value("PHI1"),
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Some(PinValue::High)
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);
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assert_eq!(
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scenario.component.get_pin_value("PHI2"),
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Some(PinValue::High)
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);
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scenario.set_clock_low();
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assert_eq!(
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scenario.component.get_pin_value("PHI1"),
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Some(PinValue::Low)
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);
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assert_eq!(
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scenario.component.get_pin_value("PHI2"),
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Some(PinValue::Low)
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);
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}
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}
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#[cfg(test)]
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mod control_pin_tests {
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use super::*;
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#[test]
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fn test_control_pin_reading() {
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let scenario = MockScenario::new("TestControlPins");
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// Test SYNC pin
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scenario.set_pin_value("SYNC", PinValue::High);
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assert_eq!(
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scenario.component.get_pin_value("SYNC"),
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Some(PinValue::High)
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);
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scenario.set_pin_value("SYNC", PinValue::Low);
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assert_eq!(
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scenario.component.get_pin_value("SYNC"),
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Some(PinValue::Low)
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);
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// Test CM-ROM pin
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scenario.component.set_pin_value("CM", PinValue::High);
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assert_eq!(scenario.component.get_pin_value("CM"), Some(PinValue::High));
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scenario.component.set_pin_value("CM", PinValue::Low);
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assert_eq!(scenario.component.get_pin_value("CM"), Some(PinValue::Low));
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// Test RESET pin
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scenario.component.set_pin_value("RESET", PinValue::High);
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assert_eq!(
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scenario.component.get_pin_value("RESET"),
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Some(PinValue::High)
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);
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scenario.component.set_pin_value("RESET", PinValue::Low);
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assert_eq!(
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scenario.component.get_pin_value("RESET"),
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Some(PinValue::Low)
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);
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}
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#[test]
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fn test_reset_functionality() {
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let mut scenario = MockScenario::new("TestReset");
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// Set up some state
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scenario.component.set_timing_state(TimingState::DriveData);
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scenario.component.set_full_address_ready(true);
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scenario.component.set_address_high_nibble(Some(0x12));
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scenario.component.set_address_low_nibble(Some(0x34));
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scenario.set_data_bus_value(0x0F);
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// Verify state is set
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assert_eq!(
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scenario.component.get_timing_state(),
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TimingState::DriveData
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);
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assert_eq!(scenario.component.get_full_address_ready(), true);
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assert_eq!(scenario.component.get_address_high_nibble(), Some(0x12));
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assert_eq!(scenario.component.get_address_low_nibble(), Some(0x34));
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assert_eq!(scenario.get_data_bus_value(), 0x0F);
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// Perform reset
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scenario.component.perform_reset();
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// Verify reset behavior
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assert_eq!(scenario.component.get_timing_state(), TimingState::Idle);
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assert_eq!(scenario.component.get_full_address_ready(), false);
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assert_eq!(scenario.component.get_address_high_nibble(), None);
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assert_eq!(scenario.component.get_address_low_nibble(), None);
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// Data bus should be tri-stated (HighZ)
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for i in 0..4 {
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let pin_name = format!("D{}", i);
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assert_eq!(
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scenario.component.get_pin_value(&pin_name),
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Some(PinValue::HighZ)
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);
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}
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}
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}
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#[cfg(test)]
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mod timing_state_tests {
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use super::*;
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#[test]
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fn test_timing_state_machine_transitions() {
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let mut scenario = MockScenario::new("TestTimingStateMachine");
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// Start in idle state
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assert_eq!(scenario.component.get_timing_state(), TimingState::Idle);
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assert!(scenario.component.get_timing_state().is_idle());
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assert!(!scenario.component.get_timing_state().is_address_phase());
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// Transition to address phase
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scenario
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.component
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.set_timing_state(TimingState::AddressPhase);
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assert_eq!(
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scenario.component.get_timing_state(),
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TimingState::AddressPhase
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);
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assert!(!scenario.component.get_timing_state().is_idle());
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assert!(scenario.component.get_timing_state().is_address_phase());
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// Transition to wait latency
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scenario
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.component
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.set_timing_state(TimingState::WaitLatency);
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assert_eq!(
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scenario.component.get_timing_state(),
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TimingState::WaitLatency
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);
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assert!(scenario.component.get_timing_state().is_waiting_latency());
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// Transition to drive data
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scenario.component.set_timing_state(TimingState::DriveData);
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assert_eq!(
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scenario.component.get_timing_state(),
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TimingState::DriveData
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);
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assert!(scenario.component.get_timing_state().is_driving_data());
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}
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#[test]
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fn test_address_latch_timing() {
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let mut scenario = MockScenario::new("TestAddressLatchTiming");
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// Set up address latching
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scenario.component.set_address_high_nibble(Some(0x12));
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scenario.component.set_address_low_nibble(Some(0x34));
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scenario.component.set_full_address_ready(true);
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// Record latch time
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let latch_time = scenario.time_provider.now();
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scenario.component.set_address_latch_time(Some(latch_time));
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// Verify state
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assert_eq!(scenario.component.get_address_high_nibble(), Some(0x12));
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assert_eq!(scenario.component.get_address_low_nibble(), Some(0x34));
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assert_eq!(scenario.component.get_full_address_ready(), true);
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assert_eq!(
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scenario.component.get_address_latch_time(),
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Some(latch_time)
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);
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// Test clearing the latch
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scenario.component.set_address_high_nibble(None);
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scenario.component.set_address_low_nibble(None);
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scenario.component.set_full_address_ready(false);
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scenario.component.set_address_latch_time(None);
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assert_eq!(scenario.component.get_address_high_nibble(), None);
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assert_eq!(scenario.component.get_address_low_nibble(), None);
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assert_eq!(scenario.component.get_full_address_ready(), false);
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assert_eq!(scenario.component.get_address_latch_time(), None);
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}
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#[test]
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fn test_access_time_configuration() {
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let scenario = MockScenario::new("TestAccessTime");
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// Test default access time
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assert_eq!(
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scenario.component.get_access_time(),
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TimingConstants::DEFAULT_ACCESS_TIME
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);
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// In a real implementation, we would test changing the access time
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// For now, we verify the getter works
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let access_time = scenario.component.get_access_time();
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assert!(access_time > Duration::from_nanos(0));
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}
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}
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#[cfg(test)]
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mod integration_scenarios {
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use super::*;
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#[test]
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fn test_complete_memory_operation_cycle() {
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let mut scenario = MockScenario::new("TestMemoryCycle");
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// Initial state
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assert_eq!(scenario.component.get_timing_state(), TimingState::Idle);
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// Phase 1: Address phase - high nibble
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scenario
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.component
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.set_timing_state(TimingState::AddressPhase);
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scenario.component.set_address_high_nibble(Some(0x12));
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assert_eq!(
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scenario.component.get_timing_state(),
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TimingState::AddressPhase
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);
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assert_eq!(scenario.component.get_address_high_nibble(), Some(0x12));
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// Phase 2: Address phase - low nibble
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scenario.component.set_address_low_nibble(Some(0x34));
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scenario.component.set_full_address_ready(true);
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let latch_time = scenario.time_provider.now();
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scenario.component.set_address_latch_time(Some(latch_time));
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// Verify address assembly
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assert_eq!(scenario.component.get_address_high_nibble(), Some(0x12));
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assert_eq!(scenario.component.get_address_low_nibble(), Some(0x34));
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assert_eq!(scenario.component.get_full_address_ready(), true);
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// Phase 3: Wait for latency
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scenario
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.component
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.set_timing_state(TimingState::WaitLatency);
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assert_eq!(
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scenario.component.get_timing_state(),
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TimingState::WaitLatency
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);
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// Advance time past access time
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scenario.advance_time(scenario.component.get_access_time() + Duration::from_nanos(10));
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// Phase 4: Drive data
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scenario.component.set_timing_state(TimingState::DriveData);
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scenario.set_data_bus_value(0x0F); // Drive some data
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assert_eq!(
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scenario.component.get_timing_state(),
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TimingState::DriveData
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);
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assert_eq!(scenario.get_data_bus_value(), 0x0F);
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// Cycle complete - return to idle
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scenario.component.set_timing_state(TimingState::Idle);
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assert_eq!(scenario.component.get_timing_state(), TimingState::Idle);
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}
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#[test]
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fn test_bus_contention_avoidance() {
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let mut scenario = MockScenario::new("TestBusContention");
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// Set up a scenario where bus contention could occur
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scenario.set_data_bus_value(0x0F);
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// In a real implementation, we would test tri-stating the bus
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// to avoid contention with other devices
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for i in 0..4 {
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let pin_name = format!("D{}", i);
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scenario.component.set_pin_value(&pin_name, PinValue::HighZ);
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assert_eq!(
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scenario.component.get_pin_value(&pin_name),
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Some(PinValue::HighZ)
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);
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}
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}
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#[test]
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fn test_multiple_address_cycles() {
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let mut scenario = MockScenario::new("TestMultipleAddresses");
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// First address cycle
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scenario.component.set_address_high_nibble(Some(0x12));
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scenario.component.set_address_low_nibble(Some(0x34));
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scenario.component.set_full_address_ready(true);
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assert_eq!(scenario.component.get_address_high_nibble(), Some(0x12));
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assert_eq!(scenario.component.get_address_low_nibble(), Some(0x34));
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// Clear for next cycle
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scenario.component.set_address_high_nibble(None);
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scenario.component.set_address_low_nibble(None);
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scenario.component.set_full_address_ready(false);
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// Second address cycle
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scenario.component.set_address_high_nibble(Some(0x56));
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scenario.component.set_address_low_nibble(Some(0x78));
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scenario.component.set_full_address_ready(true);
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assert_eq!(scenario.component.get_address_high_nibble(), Some(0x56));
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assert_eq!(scenario.component.get_address_low_nibble(), Some(0x78));
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assert_eq!(scenario.component.get_full_address_ready(), true);
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// First address should be cleared
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assert_eq!(scenario.component.get_address_high_nibble(), Some(0x56));
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assert_eq!(scenario.component.get_address_low_nibble(), Some(0x78));
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}
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}
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#[cfg(test)]
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mod error_handling_tests {
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use super::*;
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#[test]
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fn test_missing_pin_handling() {
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let scenario = MockScenario::new("TestMissingPins");
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// Test accessing non-existent pins
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assert_eq!(scenario.component.get_pin_value("NONEXISTENT"), None);
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// Standard pins should exist
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assert_eq!(
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scenario.component.get_pin_value("D0"),
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Some(PinValue::HighZ)
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);
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assert_eq!(
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scenario.component.get_pin_value("PHI1"),
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Some(PinValue::Low)
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);
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assert_eq!(
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scenario.component.get_pin_value("SYNC"),
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Some(PinValue::Low)
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);
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}
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#[test]
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fn test_invalid_pin_operations() {
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let scenario = MockScenario::new("TestInvalidOperations");
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// Test setting pin to HighZ (tri-state)
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scenario.component.set_pin_value("D0", PinValue::HighZ);
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assert_eq!(
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scenario.component.get_pin_value("D0"),
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Some(PinValue::HighZ)
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);
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// Test that HighZ is handled correctly in bus operations
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// (This would be more relevant in actual hardware interface tests)
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let bus_value = scenario.get_data_bus_value();
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// The exact behavior depends on how HighZ pins are interpreted
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// This test documents the expected structure
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}
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}
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