167 lines
No EOL
4 KiB
JSON
167 lines
No EOL
4 KiB
JSON
{
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"name": "IntelMcs4",
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"description": "Basic MCS-4 System with CPU, Clock, 2 ROMs, and 1 RAM",
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"version": "1.0",
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"metadata": {
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"author": "RustyEmu",
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"created": "2024-01-01",
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"cpu_speed": 750000,
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"architecture": "mcs4",
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"rom_count": 2,
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"ram_count": 1
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},
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"components": {
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"CPU_4004": {
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"single": {
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"component_type": "intel_4004",
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"name": "CPU_4004",
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"properties": {
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"clock_speed": 750000
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}
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}
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},
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"SYSTEM_CLOCK": {
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"single": {
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"component_type": "two_phase_clock",
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"name": "SYSTEM_CLOCK",
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"properties": {
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"frequency": 750000
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}
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}
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},
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"ROM_4001_1": {
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"single": {
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"component_type": "intel_4001",
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"name": "ROM_4001_1",
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"properties": {}
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}
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},
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"ROM_4001_2": {
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"single": {
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"component_type": "intel_4001",
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"name": "ROM_4001_2",
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"properties": {}
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}
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},
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"RAM_4002": {
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"single": {
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"component_type": "intel_4002",
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"name": "RAM_4002",
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"properties": {
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"variant": "Type1",
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"access_time": 500
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}
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}
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}
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},
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"connections": {
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"clock_signals": {
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"connection_type": "clock",
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"source": {
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"component": "SYSTEM_CLOCK",
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"pin": "PHI1"
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},
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"targets": [
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{"component": "CPU_4004", "pin": "PHI1"},
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{"component": "ROM_4001_1", "pin": "PHI1"},
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{"component": "ROM_4001_2", "pin": "PHI1"},
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{"component": "RAM_4002", "pin": "PHI1"}
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]
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},
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"clock_signals_phi2": {
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"connection_type": "clock",
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"source": {
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"component": "SYSTEM_CLOCK",
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"pin": "PHI2"
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},
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"targets": [
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{"component": "CPU_4004", "pin": "PHI2"},
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{"component": "ROM_4001_1", "pin": "PHI2"},
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{"component": "ROM_4001_2", "pin": "PHI2"},
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{"component": "RAM_4002", "pin": "PHI2"}
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]
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},
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"data_bus_d0": {
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"connection_type": "data_bus",
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"source": {
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"component": "CPU_4004",
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"pin": "D0"
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},
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"targets": [
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{"component": "ROM_4001_1", "pin": "D0"},
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{"component": "ROM_4001_2", "pin": "D0"},
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{"component": "RAM_4002", "pin": "D0"}
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]
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},
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"data_bus_d1": {
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"connection_type": "data_bus",
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"source": {
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"component": "CPU_4004",
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"pin": "D1"
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},
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"targets": [
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{"component": "ROM_4001_1", "pin": "D1"},
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{"component": "ROM_4001_2", "pin": "D1"},
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{"component": "RAM_4002", "pin": "D1"}
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]
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},
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"data_bus_d2": {
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"connection_type": "data_bus",
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"source": {
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"component": "CPU_4004",
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"pin": "D2"
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},
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"targets": [
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{"component": "ROM_4001_1", "pin": "D2"},
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{"component": "ROM_4001_2", "pin": "D2"},
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{"component": "RAM_4002", "pin": "D2"}
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]
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},
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"data_bus_d3": {
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"connection_type": "data_bus",
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"source": {
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"component": "CPU_4004",
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"pin": "D3"
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},
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"targets": [
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{"component": "ROM_4001_1", "pin": "D3"},
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{"component": "ROM_4001_2", "pin": "D3"},
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{"component": "RAM_4002", "pin": "D3"}
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]
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},
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"control_signals": {
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"connection_type": "control",
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"source": {
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"component": "CPU_4004",
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"pin": "SYNC"
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},
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"targets": [
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{"component": "ROM_4001_1", "pin": "SYNC"},
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{"component": "ROM_4001_2", "pin": "SYNC"},
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{"component": "RAM_4002", "pin": "SYNC"}
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]
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},
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"cm_signals": {
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"connection_type": "control",
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"source": {
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"component": "CPU_4004",
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"pin": "CM"
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},
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"targets": [
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{"component": "ROM_4001_1", "pin": "CM"},
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{"component": "ROM_4001_2", "pin": "CM"},
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{"component": "RAM_4002", "pin": "P0"}
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]
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}
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},
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"layout": {
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"grid_size": [10, 10],
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"positions": {
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"cpu": [1, 1],
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"clock": [0, 0],
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"rom1": [2, 0],
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"rom2": [3, 0],
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"ram": [2, 2]
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}
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}
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} |