Commit graph

13 commits

Author SHA1 Message Date
974fa25a3c Fixed borrow issues 2025-09-24 13:52:35 +02:00
f66f4c5d6c Fixes for concurrency and the fibonacci example 2025-09-24 09:44:18 +02:00
8fe6f3362c Simplified component and made it thread-safe 2025-09-24 08:48:25 +02:00
4d1a87e2af Fixes for 6502 CPUs.
They are not complete yet
2025-09-24 07:40:42 +02:00
2a78581a2d Add pin registry 2025-09-22 19:39:29 +02:00
7dd09c730d Re-implementations of all Intel 400x chips.
The MCS-4 is still broken, so are the 6502 chips
2025-09-22 19:32:44 +02:00
eff70aa889 Bug fixes in pin handling
Addition of ActiveBus for measurement and HW manipulation
2025-09-22 18:49:17 +02:00
e69c549750 Bug Fixes 2025-09-22 18:40:13 +02:00
ba1b0ddc22 More flexible bus system that takes VIC-20 address mapping and multiplexed buses like the MCS-4 into account.
Broken currently, subject to fixes
2025-09-22 17:48:16 +02:00
ddac8865fa Add .gitignore aspreparration for pushing to github 2025-09-22 09:46:58 +02:00
bfbddda58c New implementation with threads per component 2025-09-22 09:32:42 +02:00
ac8ebbafe9 Starting point for MCS-4 emulation and MOS 6502 inheritance 2025-09-21 18:54:27 +02:00
4ddb4a060f Initialized Rust project for emulation library 2024-10-22 11:18:48 +02:00