Commit graph

9 commits

Author SHA1 Message Date
e7c98f0c47 Implemented Intel 4003
Completed instruction set of 4004
Improved accuracy of 4002 and 4004 implementations
2025-09-28 20:31:12 +02:00
5bc1916b2f Introduced comments to some files
Improved accuracy and test of the Intel 4001 ROM.
Tests currently fail on the 4001.
2025-09-27 21:37:54 +02:00
cff459d2b5 Rust code formatter
Added threaded RunnableComponent trait
Accurate, threaded implementation of the 4001 ROM
2025-09-27 19:23:31 +02:00
e64d3edbd8 Sleep time for threads extended
Fix for ActiveBus check (thread did not run)
2025-09-24 15:13:17 +02:00
974fa25a3c Fixed borrow issues 2025-09-24 13:52:35 +02:00
f66f4c5d6c Fixes for concurrency and the fibonacci example 2025-09-24 09:44:18 +02:00
7dd09c730d Re-implementations of all Intel 400x chips.
The MCS-4 is still broken, so are the 6502 chips
2025-09-22 19:32:44 +02:00
e69c549750 Bug Fixes 2025-09-22 18:40:13 +02:00
ba1b0ddc22 More flexible bus system that takes VIC-20 address mapping and multiplexed buses like the MCS-4 into account.
Broken currently, subject to fixes
2025-09-22 17:48:16 +02:00