Jan-Peter von Hunnius
08f53d68fe
Introduces a VirtualClock-based timing system replacing wall-clock Instant-based timing for hardware-accurate simulation. New modules: - virtual_clock.rs: Shared virtual time source with condvar sync - real_time_governor.rs: Thread that advances virtual time - component_timing.rs: Per-component timing constraints Key changes: - Component trait: added update_at_time(), timing(), set_virtual_clock_optional() - All Intel 400x components migrated to virtual-time-aware operation - ConfigurableSystem: start() returns Result, spawns governor thread - GUI: timing controls (speed slider, mode selector, step button) - Console: speed/mode/step/time commands - Backward compatible: legacy fallback for components without VirtualClock Reviewed-by: code review found 2 warnings (clock resume() dead code, reset() safety docs) — both fixed.
47 lines
2.7 KiB
Markdown
47 lines
2.7 KiB
Markdown
# Phase 9: Update Tests for Virtual Time
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## Current State
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All 226 existing tests pass (142 unit tests, 16 fibonacci tests, 62 integration tests, 5 simple tests, 15 doc-tests). No tests are broken by the virtual time migration — the existing tests use `update()` (without virtual time) and direct component manipulation, which still works.
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## Plan
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### 1. Update `tests/lib.rs` — Add Virtual Time Test Utilities
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Add helper functions to the `test_utils` module:
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- `create_maxspeed_clock()` — Creates a VirtualClock in MaxSpeed mode with a 333ns tick size
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- `create_singlestep_clock()` — Creates a VirtualClock in SingleStep mode
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- `spawn_governor()` — Spawns a RealTimeGovernor thread for a given clock
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- `stop_and_wait()` — Stops the clock and waits for governor thread to finish
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### 2. New Test File: `tests/virtual_time_tests.rs`
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#### MaxSpeed Mode Tests
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- `test_maxspeed_clock_advances` — Verify VirtualClock advances in MaxSpeed mode with governor
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- `test_maxspeed_component_updates` — Verify Intel4001 updates correctly at virtual time
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- `test_maxspeed_rom_access_timing` — Verify ROM data is valid after access_time elapsed in virtual time
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#### SingleStep Mode Tests
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- `test_singlestep_advances_one_tick` — Verify each trigger_step() advances exactly one tick
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- `test_singlestep_rom_state_at_specific_time` — Verify ROM state at specific virtual times:
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- Before access_time: data not ready
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- After access_time: data valid
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#### Overclocking Tests
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- `test_overclocking_rom_fails_at_2mhz` — Set 2 MHz clock (250ns phase), verify ROM (500ns access) fails
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- `test_overclocking_ram_fails_at_2mhz` — Same for RAM
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- `test_shift_register_works_at_higher_freq` — Intel4003 (200ns access) works at 2 MHz (250ns phase >= 200ns)
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- `test_component_timing_check_access_time` — Direct ComponentTiming API tests
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#### Virtual Clock Integration Tests
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- `test_configurable_system_creates_virtual_clock` — Verify ConfigurableSystem has a VirtualClock
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- `test_configurable_system_maxspeed_execution` — Run system in MaxSpeed mode briefly, verify it works
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- `test_virtual_clock_stop_exits_threads` — Verify clock.stop() causes governor to exit
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- `test_pause_resume_behavior` — Verify pause stops time advancement, resume continues
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### 3. Implementation Notes
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- All new tests go in a separate file to avoid modifying existing passing tests
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- Tests use `Arc<VirtualClock>` and `RealTimeGovernor` directly (not through ConfigurableSystem) for precise control
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- Overclocking tests use `ComponentTiming::check_access_time()` directly since component-internal timing checks happen via `update_at_time()` which requires the full component thread infrastructure
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- Tests that spawn governor threads must ensure proper cleanup (stop + join)
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