6636417d18
feat: Add real-time data display for CPU registers, RAM, and ROM
2026-02-26 19:36:59 +01:00
3530ea5f28
refactor: clean up test suite and apply code formatting
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Remove redundant/obsolete tests from intel_400x_tests.rs, retaining core test coverage for Intel400x common functionality. Apply rustfmt formatting to intel_4002.rs and state machine test files.
Changes:
- Remove ~40 redundant test functions from intel_400x_tests.rs
- Apply rustfmt formatting to intel_4002.rs
- Fix import formatting in state machine tests
- Clean up trailing whitespace
2026-02-26 14:32:52 +01:00
c9f39aa600
fix: RESET pin active-LOW and clock edge state reset
2026-02-26 11:04:25 +01:00
1cf2cd6e2b
fix: address latching timing and cleanup debug code
2026-02-25 11:55:16 +01:00
aae374b713
chore: remove IDE config folders from git tracking
2026-02-24 19:26:30 +01:00
20884b57c3
feat(cpu): add A1/A2/A3 address cycle timing and fix pin propagation
2026-02-24 18:58:14 +01:00
3cdf99630c
Removed obsolete file
2025-11-14 18:53:15 +01:00
633463e370
Unified the 400x state machine for address latching
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Fixed timing issues
2025-11-14 18:51:10 +01:00
e17d6ad177
Added debug output
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Added GUI
2025-10-03 11:44:55 +02:00
3d4de8b268
Syntax cleanup, fixed never-ending test suite (console in doc-test)
2025-09-30 11:43:49 +02:00
f46cde7ef0
Completed Intel 4004 CPU implementation
2025-09-30 10:44:14 +02:00
0e0713c3a0
Fixed test failures
2025-09-30 10:23:17 +02:00
c8552a1488
Separated two-phase clock from generic clock
2025-09-30 07:22:48 +02:00
7d06837608
Added I/O demo system
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CLean up of unused components and functions
2025-09-29 21:42:37 +02:00
77ede95bce
Bugfix: Console locked
2025-09-29 20:40:06 +02:00
0278a96a8d
Added console for displaying the system state
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Corrected behaviour and tests
2025-09-29 19:02:00 +02:00
8193bcda46
Added documentation
2025-09-29 12:56:11 +02:00
95dde6e2c9
Re-created the fibonacci code and put programs into their own folder
2025-09-29 12:48:35 +02:00
6f3295dc5e
Created factory for system creation.
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Systems are now defined in JSON rather than hard-coded
2025-09-29 12:41:16 +02:00
c039e9069a
Added more tests
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Extracted common 400x behavior like timing and latching into common module
Added maxed MCS-4
2025-09-29 11:53:46 +02:00
dd93e33087
Extracted fibonacci code into binary file
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System and binary selection upon start
2025-09-28 22:23:23 +02:00
e7c98f0c47
Implemented Intel 4003
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Completed instruction set of 4004
Improved accuracy of 4002 and 4004 implementations
2025-09-28 20:31:12 +02:00
5bc1916b2f
Introduced comments to some files
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Improved accuracy and test of the Intel 4001 ROM.
Tests currently fail on the 4001.
2025-09-27 21:37:54 +02:00
cff459d2b5
Rust code formatter
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Added threaded RunnableComponent trait
Accurate, threaded implementation of the 4001 ROM
2025-09-27 19:23:31 +02:00
01117af411
Reset instead of setting program counter
2025-09-24 17:39:11 +02:00
3c85ed2b00
Fix for last ram bank
2025-09-24 16:50:20 +02:00
cb98a9b712
Quick fix for compile errors and active bus tests
2025-09-24 16:34:45 +02:00
e64d3edbd8
Sleep time for threads extended
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Fix for ActiveBus check (thread did not run)
2025-09-24 15:13:17 +02:00
974fa25a3c
Fixed borrow issues
2025-09-24 13:52:35 +02:00
f66f4c5d6c
Fixes for concurrency and the fibonacci example
2025-09-24 09:44:18 +02:00
8fe6f3362c
Simplified component and made it thread-safe
2025-09-24 08:48:25 +02:00
4d1a87e2af
Fixes for 6502 CPUs.
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They are not complete yet
2025-09-24 07:40:42 +02:00
2a78581a2d
Add pin registry
2025-09-22 19:39:29 +02:00
7dd09c730d
Re-implementations of all Intel 400x chips.
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The MCS-4 is still broken, so are the 6502 chips
2025-09-22 19:32:44 +02:00
eff70aa889
Bug fixes in pin handling
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Addition of ActiveBus for measurement and HW manipulation
2025-09-22 18:49:17 +02:00
e69c549750
Bug Fixes
2025-09-22 18:40:13 +02:00
ba1b0ddc22
More flexible bus system that takes VIC-20 address mapping and multiplexed buses like the MCS-4 into account.
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Broken currently, subject to fixes
2025-09-22 17:48:16 +02:00
ddac8865fa
Add .gitignore aspreparration for pushing to github
2025-09-22 09:46:58 +02:00
bfbddda58c
New implementation with threads per component
2025-09-22 09:32:42 +02:00
ac8ebbafe9
Starting point for MCS-4 emulation and MOS 6502 inheritance
2025-09-21 18:54:27 +02:00
4ddb4a060f
Initialized Rust project for emulation library
2024-10-22 11:18:48 +02:00