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aae374b713
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chore: remove IDE config folders from git tracking
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2026-02-24 19:26:30 +01:00 |
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20884b57c3
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feat(cpu): add A1/A2/A3 address cycle timing and fix pin propagation
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2026-02-24 18:58:14 +01:00 |
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3cdf99630c
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Removed obsolete file
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2025-11-14 18:53:15 +01:00 |
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633463e370
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Unified the 400x state machine for address latching
Fixed timing issues
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2025-11-14 18:51:10 +01:00 |
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e17d6ad177
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Added debug output
Added GUI
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2025-10-03 11:44:55 +02:00 |
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3d4de8b268
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Syntax cleanup, fixed never-ending test suite (console in doc-test)
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2025-09-30 11:43:49 +02:00 |
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f46cde7ef0
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Completed Intel 4004 CPU implementation
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2025-09-30 10:44:14 +02:00 |
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0e0713c3a0
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Fixed test failures
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2025-09-30 10:23:17 +02:00 |
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c8552a1488
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Separated two-phase clock from generic clock
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2025-09-30 07:22:48 +02:00 |
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7d06837608
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Added I/O demo system
CLean up of unused components and functions
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2025-09-29 21:42:37 +02:00 |
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77ede95bce
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Bugfix: Console locked
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2025-09-29 20:40:06 +02:00 |
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0278a96a8d
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Added console for displaying the system state
Corrected behaviour and tests
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2025-09-29 19:02:00 +02:00 |
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8193bcda46
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Added documentation
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2025-09-29 12:56:11 +02:00 |
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95dde6e2c9
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Re-created the fibonacci code and put programs into their own folder
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2025-09-29 12:48:35 +02:00 |
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6f3295dc5e
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Created factory for system creation.
Systems are now defined in JSON rather than hard-coded
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2025-09-29 12:41:16 +02:00 |
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c039e9069a
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Added more tests
Extracted common 400x behavior like timing and latching into common module
Added maxed MCS-4
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2025-09-29 11:53:46 +02:00 |
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dd93e33087
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Extracted fibonacci code into binary file
System and binary selection upon start
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2025-09-28 22:23:23 +02:00 |
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e7c98f0c47
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Implemented Intel 4003
Completed instruction set of 4004
Improved accuracy of 4002 and 4004 implementations
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2025-09-28 20:31:12 +02:00 |
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5bc1916b2f
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Introduced comments to some files
Improved accuracy and test of the Intel 4001 ROM.
Tests currently fail on the 4001.
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2025-09-27 21:37:54 +02:00 |
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cff459d2b5
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Rust code formatter
Added threaded RunnableComponent trait
Accurate, threaded implementation of the 4001 ROM
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2025-09-27 19:23:31 +02:00 |
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01117af411
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Reset instead of setting program counter
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2025-09-24 17:39:11 +02:00 |
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3c85ed2b00
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Fix for last ram bank
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2025-09-24 16:50:20 +02:00 |
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cb98a9b712
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Quick fix for compile errors and active bus tests
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2025-09-24 16:34:45 +02:00 |
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e64d3edbd8
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Sleep time for threads extended
Fix for ActiveBus check (thread did not run)
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2025-09-24 15:13:17 +02:00 |
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974fa25a3c
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Fixed borrow issues
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2025-09-24 13:52:35 +02:00 |
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f66f4c5d6c
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Fixes for concurrency and the fibonacci example
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2025-09-24 09:44:18 +02:00 |
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8fe6f3362c
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Simplified component and made it thread-safe
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2025-09-24 08:48:25 +02:00 |
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4d1a87e2af
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Fixes for 6502 CPUs.
They are not complete yet
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2025-09-24 07:40:42 +02:00 |
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2a78581a2d
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Add pin registry
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2025-09-22 19:39:29 +02:00 |
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7dd09c730d
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Re-implementations of all Intel 400x chips.
The MCS-4 is still broken, so are the 6502 chips
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2025-09-22 19:32:44 +02:00 |
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eff70aa889
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Bug fixes in pin handling
Addition of ActiveBus for measurement and HW manipulation
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2025-09-22 18:49:17 +02:00 |
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e69c549750
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Bug Fixes
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2025-09-22 18:40:13 +02:00 |
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ba1b0ddc22
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More flexible bus system that takes VIC-20 address mapping and multiplexed buses like the MCS-4 into account.
Broken currently, subject to fixes
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2025-09-22 17:48:16 +02:00 |
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ddac8865fa
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Add .gitignore aspreparration for pushing to github
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2025-09-22 09:46:58 +02:00 |
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bfbddda58c
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New implementation with threads per component
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2025-09-22 09:32:42 +02:00 |
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ac8ebbafe9
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Starting point for MCS-4 emulation and MOS 6502 inheritance
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2025-09-21 18:54:27 +02:00 |
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4ddb4a060f
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Initialized Rust project for emulation library
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2024-10-22 11:18:48 +02:00 |
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